Communication and Computation Patterns of Large Scale Image Convolutions on Parallel Architectures

Segmentation and other image processing operations rely on convolution calculations with heavy computational and memory access demands. This paper presents an analysis of a texture segmentation application containing a 96x96 convolution. Sequential execution required several hours on single processor systems with over 99% of the time spent performing the large convolution. 70% to 75% of execution time is attributable to cache misses within the convolu-tion. We implemented the same application on CM-5, iPSC/860 and PVM distributed memory multicomput-ers, tailoring the parallel algorithms to each machine's architecture. Parallelization signiicantly reduced execution time, taking 49 seconds on a 512 node CM-5 and 6.5 minutes on a 32 node iPSC/860. The results indicate for large kernel convolutions the size and bandwidth of the fast memory store is more important than processor power or communication overhead.